1. Field of the Invention
The present invention relates to a drive apparatus for a light emitting element (e.g., a semiconductor laser) used as a recording light source in an image forming apparatus or the like.
2. Related Background Art
The applicant of the basic application filed in Japan has proposed such a light emitting element drive apparatus in Japanese Laid-Open Patent Application No. 8-56034. This drive circuit turns on/off by switching the differential circuit using bipolar transistors. FIG. 1 shows the drive circuit of this prior art. Referring to FIG. 1, this circuit comprises differentially connected npn transistors 101 and 102, an insulating-gate-type NMOS transistor 103 which has a drain connected to the common emitter of the npn transistors 101 and 102 and performs constant current operation, and a semiconductor light emitting element 104 having a cathode connected to the collector of the transistor 101 through a parasitic inductance 106 of the line.
As the semiconductor light emitting element 104, a semiconductor laser or the like is used. A latent image is formed on a photosensitive medium (not shown) by turning on/off this light emitting element in accordance with image data. This circuit also has a load resistor 105 connected to the collector of the transistor 102, a parasitic inductance 107 of the line between the anode of the semiconductor light emitting element 104 and a power supply 115 as a high-potential reference voltage source, a junction capacitance 108 (C.sub.j) of the semiconductor light emitting element 104, emitter-collector capacitances 109 and 110 of the transistors 101 and 102, and a drain-gate capacitance 111 of the NMOS transistor 103 which operates as a constant current source.
One terminal of a resistor 112 is connected to the gate of the NMOS transistor 103 and one terminal of a capacitance 113. The other terminal of the resistor 112 is connected to the gate and drain of an NMOS transistor 114. The other terminal of the capacitance 113 is connected to a ground potential 116 as a low-potential reference voltage source. Inverters 117 and 118 supply complementary switching signals 121 and 122 to the bases of the differentially connected transistors, respectively. A constant current source 119 supplies a constant current to the NMOS transistor 114. Data 120 turns on/off the light emitting element.
The input data 120 is converted into the complementary signals 121 and 122 by the inverters 117 and 118 and supplied to the bases of the transistors 101 and 102. By switching the differential circuit comprised of the transistors 101 and 102 in accordance with the input data, the drain current from the NMOS transistor 103 as a constant current source is supplied to the light emitting element 104 or stopped.
The drive circuit shown in FIG. 1 is used for the engine of an LBP (Laser Beam Printer) or the like. In this case, the input data 120 corresponds to image data supplied to the printer. When the image data 120 is at high level, the light emitting element is turned off. When the image data 120 is at low level, the light emitting element is turned on. In FIG. 1, the NMOS transistor 103 is used as a constant current source to obtain a current pulse free from ringing or overshoot.
The applicant of the basic application filed in Japan has also proposed an image forming apparatus using the electrophotography process in Japanese Laid-Open Patent Application No. 8-46273. The image forming apparatus of this prior art will be described with reference to FIGS. 2A and 2B. Referring to FIG. 2A, this apparatus comprises a semiconductor laser drive circuit 201, a semiconductor laser control IC 202, a semiconductor laser diode (to be referred to as an LD hereinafter) 206, and a photodiode (to be referred to as a PD hereinafter) 207. This apparatus also has a sequence controller 203 for driving the image forming apparatus and controlling the electrophotography process, a CPU 204 of the sequence controller 203, an image controller 205 for converting character data from the host computer into dot data, a power supply line 214, and a ground line 213.
The semiconductor laser drive circuit 201 is integrated as the control IC 202. The control IC 202 has an arrangement shown in FIG. 2B. High-frequency band closed loop characteristics are realized by amplifiers 250 and 251. The light emitting amount of the LD 206 is controlled to a light amount designated by a light amount control signal 211 from the sequence controller 203 in units of pulses of an image signal. When a forced lighting signal 212 or an image signal 210 is active low, a drive current is supplied to the LD 206 through an AND circuit 253 and the amplifier 250. When the LD 206 emits light, a photocurrent flows to the PD 207. The amplifier 251 compares the set value output from a data conversion circuit 252 on the basis of the light amount control signal 211 from the CPU 204 with the photocurrent to the PD 207 and controls the light emitting amount of the LD 206 to the target light amount.
FIG. 3 shows signals at various sections of the circuit shown in FIG. 2A. A paper sheet 230 has a printing area 231. The image signal 210 is turned on/off in the printing area 231 in accordance with a horizontal synchronizing signal to form a latent image on a photosensitive medium. At this time, the light amount control signal 211 is set at a predetermined voltage (voltage value at which the light emitting amount of the LD 206 has a desired value). The light amount of the LD 206 can be changed by changing the value of the light amount control signal 211. In this case, as the voltage of the light amount control signal 211 becomes low, the light emitting amount of the LD 206 becomes large. To lower the resolution or increase the image density, the value of the light amount control signal 211 is set to be smaller. Outside the printing area 231, the light amount control signal 211 is turned off (high level) and used as a mask signal for the image signal 210. Hence, even when the image controller 205 turns on the image signal 210 outside the printing area 231, the LD 206 is prevented from emitting light.
In the image forming apparatus, the motor and optical system including the semiconductor laser are driven as a preprocess for printing. At this time, the sequence controller 203 turns on (low) the forced lighting signal 212 to forcibly turn on the LD 206 independently of image input, thereby testing the operation of the optical system including the LD 206. When the forced lighting signal 212 is to be turned on, the light amount control signal 211 must be set at predetermined value. In the image forming apparatus having the above arrangement, the horizontal synchronizing signal (BD signal) used as a synchronizing signal of each line is obtained by causing the LD 206 to emit light before the printing area 231 and detecting the laser beam with a sensor (BD sensor) set at a predetermined position. In forming the BD signal as well, the forced lighting signal 212 is turned on, and the light amount control signal 211 is set at a predetermined value.
This processing of masking the image signal outside the printing area and forcibly turning on the semiconductor laser diode is performed by the sequence controller 203. Instead, the sequence controller 203 may supply a light amount control signal 211 and forced lighting signal 212 to the semiconductor laser drive circuit 201, so the processing is executed on the semiconductor laser drive circuit 201 side. With this arrangement, the processing load on the sequence controller can be decreased. In addition, since image processing which is normally done by the sequence controller is executed by a versatile gate array or the like, degradation in pulse width reproducibility of the image signal from the image controller can be prevented.
FIG. 4 shows a two-input NOR circuit using a general ECL (Emitter Coupled Logic). A differential circuit is formed by a pair of npn transistors 301 and 302 and an npn transistor 303. The circuit has a constant current source 304 for supplying a constant current to the differential circuit, resistors 305 and 306 as the load of the differential circuit, a power supply line 308, and a ground line 307. Complementary outputs 309 and 310 from the differential circuit are connected to the input terminals (base electrodes of npn transistors 311 and 312) of a level shift circuit comprising the npn transistors 311 and 312 and constant current sources 313 and 314. This level shift circuit adjusts the DC level of the output from the NOR circuit to the input range of the subsequent stage. Outputs 315 and 316 from the level shift circuit are complementary outputs from the NOR circuit. Inputs 317 and 318 to the NOR circuit are input to the bases of the npn transistors 301 and 302, respectively. A reference voltage 319 is used to determine high or low level of the inputs 317 and 318 and input to the base to the npn transistor 303.
In the circuit shown in FIG. 4, when at least one of the inputs 317 and 318 is larger (higher) than the reference voltage, at least a corresponding one of the transistors 301 and 302 is turned on, and the transistor 303 is turned off. Hence, the constant current from the constant current source 304 flows to the load resistor 305, and the output 309 from the differential circuit and the output 315 from the NOR circuit go low. To the contrary, no current flows to the resistor 306. The output 310 from the differential circuit equals the power supply voltage, and the output 316 from the NOR circuit goes high, so an output signal complementary to the output 315 is output.
On the other hand, when both the inputs 317 and 318 are smaller than the reference voltage, both the transistors 301 and 302 are turned off, and the transistor 303 is turned on. The current from the constant current source 304 flows to the load resistor 306, and the output 310 from the differential circuit and the output 316 from the NOR circuit go low. To the contrary, no current flows to the resistor 305. The output 310 from the differential circuit equals the power supply voltage, and the output 315 from the NOR circuit goes high, so an output signal complementary to the output 316 is output. As described above, the circuit shown in FIG. 4 operates as a NOR circuit (output 315) or an OR circuit (output 316) for receiving the signals 317 and 318. By selecting the load resistor and the constant current value so the transistors operate in the nonsaturation region, a circuit arrangement allowing high-speed operation and suitable for high-speed signal processing is realized.
For current print systems using laser beam printers, image or photograph output, higher-speed processing, and higher resolution are increasingly required. For a laser diode, a switching speed of several ten MHz to several hundred MHz is required. Additionally, to realize a higher image quality, it is essential to obtain high reproducibility of output pulse width of a laser diode. The scheme of controlling the current to the light emitting element by switching operation of the differential circuit using bipolar transistors shown in FIG. 1 is advantageous for high-speed processing. However, this circuit poses the following problems because a single image signal is received by the control IC, and complementary input signals to the differential circuit are generated in the control IC using inverters.
As the first problem, when a single image signal is converted into the complementary signals 121 and 122 using the inverters 117 and 118 and input to the differential circuit formed by the transistors 101 and 102, a delay difference is generated between the two signals because the signal 122 passes through the second inverter 118, so the output pulse width of the laser diode shifts from the original image signal. More specifically, both the signals 121 and 122 temporarily go high or low due to the delay difference. During this time, the current from the constant power supply 111 nearly equally flows to the transistors 101 and 102. The current flowing to the light emitting element is 1/2 the predetermined amount and cannot reach the threshold current for light emission. During this time, no light emission occurs, and the light pulse width becomes small. This appears as a line width difference (decrease) in output from the LBP. The delay time per inverter is several tenth to one nsec. This poses no problem when the speed or resolution is low. However, when an operation speed of several ten MHz to several hundred MHz is required, the delay poses a serious problem.
The second problem is noise. Use of a single image signal is disadvantageous because RF noise is generated on a substrate on which a control IC is mounted or a semiconductor substrate on which a light emitting element drive circuit is integrated as the operation speed becomes higher. As a high-speed logic circuit, the ECL circuit shown in FIG. 4 can be used. However, complementary inputs cannot be processed except when the circuit is used as an inverter. To perform signal processing as shown in FIGS. 2A and 3, the image signal must be temporarily converted into a single output and processed, and then complementary signals must be generated again. In this case, however, the initial purpose of obtaining a noise-free signal by transmitting complementary signals cannot be achieved. In addition, the circuit scale becomes large to result in an increase in cost.